High voltage photovoltaic cell based on buried porous silicon as a local isolation material

Asscher Micha, HUJI, Faculty of Science, The Institute of Chemistry
Sa'ar (Saar) Amir, HUJI, Faculty of Science, The Racah Institute of Physics

Buried porous silicon employed as local isolation material


Cleantech, Solar Energy, Photovoltaics, Energy, Devices, Semiconductors, Microelectronics

Development Stage

Ongoing research; development of prototype

Patent Status

Two United States patent applications have been filed and are pending review/acceptance


  • High-voltage photovoltaic (PV) cells convert sunlight into electricity with the ability to generate high open-circuit voltage (greater than 1V) for applications such as autonomous portable devices and concentrative PV.
  • Existing high-voltage PV technology requires the use of expensive silicon on insulator (SOI) wafers (relative to the much cheaper standard silicon wafers) for isolation between small sub-cells (vertical p-i-n junctions) that are internally connected in series to generate the high-voltage.

Our Innovation

  • Use of (relatively low-cost) standard silicon wafers and buried layers of oxidized porous silicon for local isolation between the sub-cells.
  • Use of simple electrochemical etching technique, compatible with standard microelectronics, to create the buried layers of oxidized porous silicon.



Key Features

  • Very high level of isolation (resistance larger than Giga-Ohms) has been demonstrated for the device.
  • The number of sub-cells (vertical p-i-n junctions) can be designed and controlled according to the application under consideration. In principle, the number of cells is unlimited (up to few thousands of sub-cells for applications where kV power sources are required).
  • In principle, the proposed technology (local isolation by oxidized porous silicon) is largely compatible with standard microelectronics and can be implemented in most conventional microelectronics FABs.

Development Milestones

  • The "oxidized porous silicon for local isolation" technology has already been demonstrated on prototype chips in the laboratory. The current project is aimed at demonstrating manufacturing viability and building of industrial prototype devices.
  • In particular, the aim is to demonstrate the compatibility of the technology (local isolation with oxidized porous silicon) with standard fabrication facilities of CMOS circuits.
  • A feasibility study to identify a specific application (such as concentrated-PV or autonomous portable devices) for demonstrating the advantages of the proposed technology over existing solutions is to be carried out.

The Opportunity

Small high-voltage cells can find applications in fields such as power sources for autonomous portable devices and for MEMS devices. In these cases only small amounts of power (small cell area) are needed, but the voltage must be high enough to power the electronics. A cell that will produce the required voltage without the need for an up-converter will be a significant simplification for these systems and will fill a niche need that is not currently addressed.


Researcher Information          http://nanoscience.huji.ac.il/researchers/saar.htm, http://chem.ch.huji.ac.il/surface-asscher/




Patent Status

Granted US 8,829,332; US 8,828,781

Contact for more information:

Eitan Dekel
VP Business Development - Computer Science